Design and analysis of on-chip symmetric parallel-plate coupled-line balun for silicon RF integrated circuits | Semantic Scholar
Characterization of on-chip balun with patterned floating shield in 65 nm CMOS
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Figure 1 from Low-loss balun design and compact modeling for RF/millimeter-wave circuit application | Semantic Scholar
50 GHz S-shaped rat-race balun with 1.4 dB insertion loss in a wafer-level chip-size package process | International Journal of Microwave and Wireless Technologies | Cambridge Core
Balun by RJ45 with chip up to 300m active - BLU02VD
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Dr. Mühlhaus Consulting & Software GmbH » 60 GHz on-chip balun transformer: effect of dummy metal fill